HP Unveils New Interface For Nano-Electronic Circuits

June 10, 2005 | Source: ExtremeNanotech

According to HP, coding theory will be the key to building a “defect tolerant interface” for its nanoelectronic cross-bar architecture in future processors.

The method adds 50 percent more nanowires as an “insurance policy” to fabricate nano-electronic circuits with nearly perfect yields even though the probability of broken components will be high.