Moore’s Law is coming to an end, according to a recent research paper authored by Intel researchers. It theorizes that chipmakers will hit a wall at the 5-nanometer transistor gate length for chips made on a 16-nanometer technology process.

When the gate length gets below 5 nanometers, tunneling will begin to occur. Electrons will simply pass through the channel on their own, because the source and the drain will be extremely close.

On a two-year cycle, this would mean that 16-nanometer chips would appear in 2013 with the barriers preventing new, smaller chips in 2015. Manufacturers, however, have had to delay the introduction of new processes recently. On a three-year cycle, 5-nanometer chips won’t hit until 2018 or 2019, putting a barrier generation at about 2021.

Alternate processes for possibly dealing with this limitation include nanotubes, 3D chips, and making chips larger.

“Limits to Binary Logic Switch Scaling–A Gedanken Model,” Proceedings of the IEEE, November 2003