Silicon oxide chip design could replace flash memory
July 15, 2013
A Rice University team led by chemist James Tour has built a 1-kilobit rewritable silicon oxide chip that could surpass the limitations of flash memory in packing density, energy consumption per bit, and switching speed.
Normal operating voltages can repeatedly break and “heal” the channel, which can be read as either a “1” or “0” depending on whether it is broken or intact.
The circuits require only two terminals instead of three, as in most memory chips. These crossbar memories are flexible, resist heat and radiation, and show promise for stacking in three-dimensional arrays. Their ability to hold a pattern when exposed to radiation is now being tested aboard the International Space Station .
The diodes also eliminate crosstalk inherent in crossbar structures by keeping the electronic state on a cell from leaking into adjacent cells, Tour said.
The devices, dubbed “one diode-one resistor” (1D-1R), have proven to be robust. They have a high on/off ratio of about 10,000 to 1, over the equivalent of 10 years of use, with low-energy consumption.
They also have the capability for multibit switching, which would allow higher density information storage than conventional two-state memory systems.
The technique is based on an earlier discovery by the Tour lab: when electricity passes through a layer of silicon oxide, it strips away oxygen molecules and creates a channel of pure metallic-phase silicon that is less than five nanometers wide.
The Boeing Corp. and the Air Force Office of Scientific Research funded the work.