A published road map for the semiconductor industry has the smallest distances between wires on a memory chip shrinking from 90 nanometers today to 65nm in 2007, to 45nm in 2010, to 32nm in 2013 and on down from there.

HP hopes to apply some of its research ideas toward the 32nm milestone. The idea isn’t to replace silicon transistors but to build certain devices, such as ultradense memories, on top of CMOS chips.

HP Labs physicist Duncan Stewart also says HP hopes to eventually build crossbar devices smaller than 3nm. These are molecular-scale circuits consisting of grids of wires whose intersections can be populated, by programming, with various devices such as resistors, diodes and switches.