New bandwidth management techniques boost operating efficiency in multi-core chips

May 26, 2011

Researchers from North Carolina State University have developed two new techniques to help maximize the performance of multi-core computer chips by allowing them to retrieve data more efficiently.

The techniques, allocating bandwidth and prefetching data, boost chip performance by 10 to 40 percent, the researchers said.

They used easily collected data from the hardware counters on each chip to determine which cores needed more bandwidth.  By better distributing the bandwidth to the appropriate cores, they were able to maximize system performance.

The researchers then developed criteria to determine when prefetching will boost performance and should be utilized, and when prefetching would slow things down and should be avoided.

Utilizing both bandwidth and prefetching data, the researchers were able to boost multi-core chip performance by 40 percent, compared to multi-core chips that do not prefetch data, and by 10 percent over multi-core chips that always prefetch data.

Ref: Yan Solihin & Fang Liu, Studying the Impact of Hardware Prefetching and Bandwidth Partitioning in Chip-Multiprocessors, paper to be presented June 9 at the International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS 2011) in San Jose, Calif.